(1) Field of the Invention
The present invention relates to fabrication processes used to create a dynamic random access memory, (DRAM), device, on a semiconductor substrate
(2) Description of Prior Art
Cylindrical shaped, capacitor structures, have been used to increase the surface area of DRAM capacitors, and thus increase the signal or performance of DRAM devices. Stacked capacitor structures, (STC), located overlying the transfer gate transistor, of the DRAM device, are limited by the dimensions of the underlying transfer gate transistor. Therefore to increase the surface area of the STC structure, without infringing on neighboring, underlying transfer gate transistors, specific STC shapes are employed. For example, a cylindrical shaped, storage node structure, comprised of vertical polysilicon features, connected to an underlying horizontal polysilicon feature, offers increased storage node surface area, when compared to counterparts, fabricated without vertical polysilicon features, or without the use of the cylindrical shape. The use of the cylindrical shaped, STC structure, however results in a difficulties when patterning the cell plate, or upper plate, of the STC structure. The cylindrical shape, established for the lower plate, or storage node structure, of the STC structure, presents a difficult topography when attempting to define the polysilicon upper plate, via photoresist and dry etching procedures.
This invention will offer a novel method for definition of the polysilicon cell plate, or lower plate, wherein the definition of this plate is accomplished during the same procedure used to create a bit line contact hole. This invention will describe the attainment of a Capacitor Under Bit line, (CUB), structure, where the STC structure exhibits a cylindrical shape, and where the bit line contact hole opening procedure, also defines the final STC configuration. Prior art, such as Jost et al, in U.S. Pat No. 5,605,857, Sung, in U.S. Pat. No. 5,648,291, and Dennison, in U.S. Pat. No. 5,206,183, all describe the formation of bit line contact holes, however none of these prior arts describe a process for defining the STC structure, during the bit line contact hole opening.